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1/16 www.rohm.com 2011.03 - rev. a ? 2011 rohm co., ltd. all rights reserved. power management ics for mobile phones system regulator with high efficiency dc/dc converters bh6172gu descriptions bh6172gu incorporates 1 dcdc+ 5 linear ldo regulators. it is integrated in a sm all 2.6mm2.6mm size package, with 16 steps adjustable vo?s for every channel, low voltage output (0.8 v~) to support almost any kind of mobile application now available. features 1) 1ch 500ma, high efficiency step-down converter. (16 steps adjustable vo by i 2 c) 2) 5-channel cmos-type ldos. (16 steps adjustable vo by i 2 c, 150ma 3, 300ma 2) 3) power on/off control enabled by i2c interface or external pin 4) i 2 c compatible interface. (device address is ?1001111?) 5) wafer level csp package(2.6mm 2.6mm) for space-constrained applications 6) discharge resistance selectable for power-down sequence ramp speed control 7) over-current protection in all ldo regulators 8) over-current protection in step-down converter 9) over-voltage protection in step-down converter 10) thermal shutdown protection applications mobile phones, portable game systems, portable mp3 play ers, portable dvd players, portable tv, portable gps, pda, portable electronic dictionaries, etc. absolute maximum ratings (ta=25 ) parameter symbol ratings unit maximum supply voltage (vbat) vbatmax 6.0 v maximum supply voltage (pbat) vpbatmax 6.0 v maximum supply voltage (vusb) vusbmax 6.0 v maximum supply voltage (dvdd) dvddmax 4.5 v maximum input voltage 1 (lx, fb, out1, out2, out3, out4, out5, en_ld1, en_ld2, en_ld3, en_ld4) vinmax1 vbat + 0.3 v maximum input voltage 2 (nrst, clk, data) vinmax2 dvdd + 0.3 v power dissipation pd 900* 1 mw operating temperatur e range topr -35 +85 storage temperature range tstg -55 +125 * this is an allowable loss of the rohm evaluation glass epoxy board(60mm 60mm 16mm). to use at temperature higher than 25 , derate 9.0mw per 1 . *1 must not exceed pd or aso. no.11032eat04
technical note 2/16 www.rohm.com 2011.03 - rev. a ? 2011 rohm co., ltd. all rights reserved. bh6172gu recommended operating conditions (ta=25 ) parameter symbol ratings unit vbat voltage vbat 2.20 5.50* 2 v pbat voltage vpbat 2.20 5.50* 2 v vusb voltage vusb 2.20 5.50* 2 * 3 v dvdd voltage vdvdd 1.70 4.20* 4 v *2 whenever the vbat or pbat or vusb vo ltage is under the ldo, swreg output voltage, or else under certain levels, the ldo and swreg output is not guaranteed to meet its published specifications. *3 vusb power supply can be externally connect ed to the vbat, pbat power supply when necessary. *4 the dvdd voltage must be under the ba ttery voltage vbat, pbat at any times. electrical characteristics (unless otherwise specified, ta=25 , vbat=pbat =3.6v, vusb=5.0v) parameter symbol limits unit condition min. typ. max. circuit current vbat circuit current 1 (off) iqvb1 - 0.4 1 a ldo1 5=off swreg1=off nrst=l dvdd=0v vusb circuit current 1 (off) iqusb1 - 0 1 a vbat circuit current 2 (off) iqvb2 - 0.4 1 a ldo1 5=off swreg1=off nrst=l dvdd=0v vusb=vbat external connection vbat circuit current 3 (standby) iqvb3 - 0.7 1.4 a ldo1 5=off swreg1=off nrst=h dvdd=2.6v vusb circuit current 2 (standby) iqusb2 - 0 1 a vbat circuit current 4 (standby) iqvb4 - 0.7 1.4 a ldo1 5=off swreg1=off nrst=h dvdd=2.6v vusb=vbat external connection vbat circuit current 5 (active) iqvb5 - 170 300 a ldo1 5=on(no load, initial voltage) swreg1=on(no load, initial voltage) nrst=h dvdd=2.6v vusb circuit current 3 (active) iqusb3 - 35 70 a vbat circuit current 6 (active) iqvb6 - 200 350 a ldo1 5=on(no load, initial voltage) swreg1=on(no load, initial voltage) nrst=h dvdd=2.6v vusb=vbat external connection this product is not especially designed to be protected from radioactivity.
technical note 3/16 www.rohm.com 2011.03 - rev. a ? 2011 rohm co., ltd. all rights reserved. bh6172gu electrical characteristics (unless otherwise specified, ta=25 , vbat=pbat =3.6v, vusb=5.0v, dvdd=2.6v) parameter symbol limits unit condition min. typ. max. logic pin character nrst (cmos input) input ?h? level vih1 dvdd 0.7 - dvdd +0.3 v pin voltage: dvdd input ?l? level vil1 -0.3 - dvdd 0.3 v pin voltage: 0 v input leak current iic1 0 0.3 1 a en_ld1, en_ld2, en_ld3, en_ld4 (nmos input) input ?h? level vih2 1.44 - - v input ?l? level vil2 - - 0.4 v input leak current iic2 -1 0 1 a digital characteristics (digital pins: clk and data ) input "h" level vih3 dvdd 0.8 - dvdd +0.3 v input "l" level vil3 -0.3 - dvdd 0.2 v input leak current iic3 -1 0 1 a pin voltage: dvdd data output "l" level voltage vol - - 0.4 v iol=6ma swreg output voltage vosw 0.94 1.00 1.06 v initial value io=100ma output current io sw - - 500 ma vo=1.00v efficiency sw - 90 - % io=100ma, vo=2.40v, vbat=3.2v oscillating frequency f osc - 1.7 - mhz vo=1.00v output inductance l swreg 1.5 2.2 - h ta= -30 75 short circuit current i shtsw - 500 - ma ta= -30 75 output capacitance c swreg 3.3 4.7 - f ta = - 3 0 75 with swreg's dc bias
technical note 4/16 www.rohm.com 2011.03 - rev. a ? 2011 rohm co., ltd. all rights reserved. bh6172gu electrical characteristics (unless otherwise specified, ta=25 , vbat=pbat =3.6v, vusb=5.0v) parameter symbol limits unit condition min. typ. max. ldo1 output voltage vo m1 0.970 1.000 1.030 v initial value io=1ma@vbat=4.5v io=150ma@vbat=3.4v output current vom1c - - 150 ma vo=1.0v dropout voltage vom1dp - 0.1 - v io=50ma input voltage stability S vim1 - 2 - mv vbat=3.4 4.5v, io=50ma vo=1.0v load stability S vlm1 - 20 - mv io=50a 150ma, vbat=3.6v vo=1.0v ripple rejection ratio rrm1 - 60 - db v r =-20dbv, f r =120hz io=50ma, vo=2.6v bw=20hz 20khz short circuit current i shtm3 - 180 - ma vo=0v output capacitor c out1 - 1.0 - f ta = - 3 0 75 with ldo's dc bias ldo2 output voltage vo m2 2.522 2.600 2.678 v initial value io=1ma@vbat=4.5v io=150ma@vbat=3.4v output current vom2c - - 150 ma vo=2.6v dropout voltage vom2dp - 0.1 - v io=50ma input voltage stability S vim2 - 2 - mv vbat=3.4 4.5v, io=50ma vo=2.6v load stability S vlm2 - 20 - mv io=50a 150ma, vbat=3.6v vo=2.6v ripple rejection ratio rrm2 - 60 - db v r =-20dbv, f r =120hz io=50ma, vo=2.6v bw=20hz 20khz short circuit current i shtm3 - 180 - ma vo=0v output capacitor c out2 - 1.0 - f ta = - 3 0 75 with ldo's dc bias ldo3 output voltage vo m3 2.716 2.800 2.884 v initial value io=1ma@vbat=4.5v io=150ma@vbat=3.4v output current vom3c - - 300 ma vo=2.8v dropout voltage vom3dp - 0.1 - v io=50ma input voltage stability S vim3 - 2 - mv vbat=3.4 4.5v, io=50ma vo=2.8v load stability S vlm3 - 20 - mv io=50a 300ma, vbat=3.6v vo=2.8v ripple rejection ratio rrm3 - 60 - db v r =-20dbv, f r =120hz io=50ma, vo=2.6v bw=20hz 20khz short circuit current i shtm3 - 180 - ma vo=0v output capacitor c out3 - 1.0 - f ta = - 3 0 75 with ldo's dc bias
technical note 5/16 www.rohm.com 2011.03 - rev. a ? 2011 rohm co., ltd. all rights reserved. bh6172gu electrical characteristics (unless otherwise specified, ta=25 , vbat=pbat =3.6v, vusb=5.0v) parameter symbol limits unit condition min. typ. max. ldo4 output voltage vo m4 1.746 1.800 1.854 v initial value io=1ma@vbat=4.5v io=300ma@vbat=3.4v output current vom4c - - 300 ma vo=1.8v dropout voltage vom4dp - 0.1 - v io=50ma input voltage stability S vim4 - 2 - mv vbat=3.4 4.5v, io=50ma vo=1.8v load stability S vlm4 - 30 - mv io=50a 300ma, vbat=3.6v vo=1.8v ripple rejection ratio rrm4 - 60 - db v r =-20dbv, f r =120hz io=50ma, vo=2.6v bw=20hz 20khz short circuit current i shtm4 - 340 - ma vo=0v output capacitor c out4 - 1.0 - f ta = - 3 0 75 with ldo's dc bias ldo5 output voltage vo m5 3.201 3.300 3.399 v initial value io=1ma@vusb=5.5v io=150ma@vusb=4.4v output current vom5c - - 150 ma vo=3.3v dropout voltage vom5dp - 0.1 - v io=50ma input voltage stability S vim5 - 2 - mv vusb=4.4 5.5v, io=50ma vo=3.3v load stability S vlm5 - 20 - mv io=50a 150ma, vusb=5.5v vo=3.3v ripple rejection ratio rrm5 - 60 - db v r =-20dbv, f r =120hz io=50ma, vo=2.6v bw=20hz 20khz short circuit current i shtm5 - 180 - ma vo=0v output capacitor c out5 - 1.0 - f ta = - 3 0 75 with ldo's dc bias
technical note 6/16 www.rohm.com 2011.03 - rev. a ? 2011 rohm co., ltd. all rights reserved. bh6172gu swreg & ldos output voltage table parameter usage example power supply initial output voltage load max adjustable range swreg core vbat/pbat 1.00v 500ma 0.80-2.40v ldo1 core vbat 1.00v 150ma 1.00-3.30v ldo2 i/o1 vbat 2.60v 150ma 1.00-3.30v ldo3 memory vbat 2.80v 300ma 1.20-3.30v ldo4 i/o2 vbat 1.80v 300ma 1.20-3.30v ldo5 usb vbat/vusb 3.30v 150ma 1.20-3.30v parameter swreg ldo1 ld o2 ldo3 ldo4 ldo5 programmable output voltages 0.80v 1.00v 1.00v 1.20v 1.20v 1.20v 0.85v 1.10v 1.10v 1.30v 1.30v 1.30v 0.90v 1.20v 1.20v 1.40v 1.40v 1.40v 0.95v 1.30v 1.30v 1.50v 1.50v 1.50v 1.00v 1.40v 1.40v 1.60v 1.60v 1.60v 1.05v 1.50v 1.50v 1.70v 1.70v 1.70v 1.10v 1.60v 1.60v 1.80v 1.80v 1.80v 1.15v 1.70v 1.70v 1.85v 1.85v 1.85v 1.20v 1.80v 1.80v 1.90v 1.90v 1.90v 1.365v 1.85v 1.85v 2.00v 2.00v 2.00v 1.40v 2.60v 2.60v 2.60v 2.60v 2.60v 1.50v 2.70v 2.70v 2.70v 2.70v 2.70v 1.65v 2.80v 2.80v 2.80v 2.80v 2.80v 1.80v 2.85v 2.85v 2.85v 2.85v 2.85v 1.85v 3.00v 3.00v 3.00v 3.00v 3.00v 2.40v 3.30v 3.30v 3.30v 3.30v 3.30v
technical note 7/16 www.rohm.com 2011.03 - rev. a ? 2011 rohm co., ltd. all rights reserved. bh6172gu block diagram, ball matrix fig.1 block diagram fig.2 ball matrix pin description ball no. pin name function b4 data data input/output for i 2 c c4 clk clk input for i 2 c e1 vbat1 power supply 1 e4 vbat2 power supply 2 a5 pbat power supply for swreg a4 lx inductor connect pin for swreg a3 pgnd ground for swreg b5 fb voltage feed back pin for swreg d4 nrst reset input pin (low active) d5 out1 ldo1 output d1 out2 ldo2 output e5 out3 ldo3 output e3 out4 ldo4 output a1 out5 ldo5 output b1 refc reference voltage output c2 en_ld1 ldo1 enable pin d2 en_ld2 ldo2 enable pin d3 en_ld3 ldo3 enable pin c3 en_ld4 ldo4 enable pin a2 vusb usbvbus power supply *1 c5 dvdd digital power supply c1 gnd analog ground b3 test test pin (always keep open at normal use) e2 test2 test pin (always keep open at normal use) * est, test2 pin is used during our company shipment test. lease keep test pin and test2 pin ?open? at all times. *1 usb power supply can be externally c onnected to the vbat power supply when necessary. swreg 0.8-2.40v vbat1 pbat fb pgnd lx vbat2 gnd ldo1 1.00-3.30v 0.1v step ldo2 1.00-3.30v 0.1v step ldo3 1.20-3.30v 0.1v step ldo4 1.20-3.30v 0.1v step ldo5 1.20-3.30v 0.1v step out1 out2 out3 out4 out5 150ma 300ma 300ma 150ma 150ma 500ma 1f 1f 1f 1f 1f ref refc 0.1f 4.7f 4.7f 2.2h en_ld1 en_ld2 en_ld3 en_ld4 i2c if data clk nrst dvdd init 1.00v init 1.00v init 2.60v init 2.80v init 1.80v init 3.30v vusb (open) test (open) test2 4.7f 1f c out4 vbat2 nrst en_ld3 en_ld4 clk data test lx pgnd vbat1 test2 en_ld2 out2 gnd en_ld1 refc vusb out5 out3 out1 dvdd fb pbat a b d e 12345
technical note 8/16 www.rohm.com 2011.03 - rev. a ? 2011 rohm co., ltd. all rights reserved. bh6172gu i 2 c bus interface the i 2 c compatible synchronous serial interface provides acce ss to programmable functions and register on the device. this protocol uses a two-wire interface for bi-directional communications between the lsi?s connected to the bus. the two interface lines are the serial data line (data), and t he serial clock line (clk). these lines should be connected to the power supply dvdd by a pull-up resistor, and remain high even when the bus is idle. 1. start and stop conditions when clk is high, pulling data low produces a start condition and pulling data high produces a stop condition. every instruction is started when a start condition occurs and terminated when a stop condition occurs. during read, a stop condition causes the read to terminate and the chip enters t he standby state. during write, a stop condition causes the fetching of write data to terminate, after which writing starts automatically. upon the completion of writing, the chip enters the standby state. two or more start conditions cannot be entered consecutively. t su.sta t hd.sta t su.sto clk data start condition stop condition fig.3 i 2 c start, stop condition 2. data transmission data on the data input can be modified while clk is low. w hen clk is high, modifying the data input means a start or stop condition. t su.dat t hd.dat clk data modify data modify data fig.4 i 2 c data transmission timing all other acknowledge, write, and read timings all conform to the i 2 c standard. 3. device addressing the device address for this device is ?1001111?. 1001 111 device address code read/write instruction msb lsb r/w fig.5 i 2 c device address
technical note 9/16 www.rohm.com 2011.03 - rev. a ? 2011 rohm co., ltd. all rights reserved. bh6172gu i 2 c bus ac specification characteristics symbol min. max. unit clk clock frequency fclk 0 400 khz clk clock ?low? time tlow 1.3 - s clk clock ?high? time thigh 0.6 - s bus free time tbuf 1.3 - s start condition hold time thd.sta 0.6 - s start condition setup time tsu.sta 0.6 - s data input hold time thd.dat 0 - ns data input setup time tsu.dat 100 - ns stop condition setup time tsu.sto 0.6 - s clk data (input) t f t high t low t r t su.sto t su.dat t hd.dat t su.sta t hd.sta t buf fig.6 bus timing 1 clk data (input) t wr stop condition acknowledge output write data input start condition d o fig.7 bus timing 2
technical note 10/16 www.rohm.com 2011.03 - rev. a ? 2011 rohm co., ltd. all rights reserved. bh6172gu i 2 c register information regcnt(swregon, ldo*on) control each swreg, ldo. 0 on 1 off swadj(swregadj[3:0]) change swreg output voltage by 16 steps. ?0000? 0.80v ?1111? 2.40v ldoadj*(ldo*adj[3:0]) change ldo1 5 output voltage by 16 steps. ?0000? 1.00v(ldo1, 2) , 1.20v(ldo3, 4, 5) ?1111? 3.30v pdsel(swpdsel, ldo*pdsel) change the discharge resistance of swreg, ldo. 0 1k 1 10k pdcnt(swpd, ldo*pd) enable/disable the discharge resistance of swreg, ldo. 0 discharge disable 1 discharge enable en_sel(enld*_en) select either an enable pin or i 2 c register for ldo1 4 on/off control. 0 external enable pin selected 1 i 2 c register selected
technical note 11/16 www.rohm.com 2011.03 - rev. a ? 2011 rohm co., ltd. all rights reserved. bh6172gu 0 1 2 3 4 5 6 7 8 9 10 00.511.522.533.544.555.56 vbat [v] i_vbat [ua] icc(off) vusb=5.0v 0 1 2 3 4 5 6 7 8 9 10 00.511.522.533.544.555.56 vbat [v] i_vbat [ua] icc(off) vbat=vusb short 0 1 2 3 4 5 6 7 8 9 10 00.511.522.533.544.555.56 vbat [v] i_vbat [ua] icc(stby) vbat=vusb short 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 3.2 3.7 4.2 4.7 5.2 5.7 vbat [v] i_vbat [ma] icc(active) vbat=vusb short reference data(icc) reference data(swreg) 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 vb at [ v] fb [v] swreg line regulation vo=1.0v vbat 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2 0 50 100 150 200 250 300 350 400 450 500 io [ma] fb [v] swreg load regulation vo=1.0v 0 10 20 30 40 50 60 70 80 90 100 0 50 100 150 200 250 300 350 400 450 500 io[ m a] efficiency[%] swreg efficie n cy vs io (vo =1.365v) vbat=3.6v
technical note 12/16 www.rohm.com 2011.03 - rev. a ? 2011 rohm co., ltd. all rights reserved. bh6172gu reference data(output stability) reference data(input stability) 0 0.5 1 1.5 2 2.5 3 3.5 4 0 50 100 150 200 io [ma] out1 [v] ldo1 load regulation 1.20v 0 0.5 1 1.5 2 2.5 3 3.5 4 0 50 100 150 200 io [ma] out2 [v] ldo2 load regulation 2.60v 0 0.5 1 1.5 2 2.5 3 3.5 4 0 50 100 150 200 250 300 io [ma] out3 [v] ldo3 load regulation 3.0v 0 0.5 1 1.5 2 2.5 3 3.5 4 0 100 200 300 400 io [ma] out4 [v] ldo4 load regulation 1.80v 0 0.5 1 1.5 2 2.5 3 3.5 4 0 50 100 150 200 io [ma] out5 [v] ldo5 load regulation 3.30v 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 00.511.522.533.544.555.56 vbat [v] out1 [v] ldo1 line regulation 1.20v vbat 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 00.511.522.533.544.555.56 vbat [v] out2 [v] vbat ldo2 line regulation 2.60v 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 00.511.522.533.544.555.56 vbat [v] out3 [v] vbat ldo3 line regulation 3.0v 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 00.511.522.533.544.555.56 vbat [v] out4 [v] vbat ldo4 line regulation 1.80v 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 00.511.522.533.544.555.56 vusb [v] out5 [v] ldo5 line regulation 3.30v vusb
technical note 13/16 www.rohm.com 2011.03 - rev. a ? 2011 rohm co., ltd. all rights reserved. bh6172gu reference data(load transient response) reference data(rise time) ldo1 ldo2 ldo3 ldo4 ldo5 io ldo1 io ldo1 io io ldo2 ldo2 io ldo3 io ldo3 io ldo4 io ldo4 io ldo5 io ldo5 ldo1 ldo2 ldo3 ldo4 en_ld1 ldo1 en_ld2 ldo2 en_ld3 ldo3 en_ld4 ldo4
technical note 14/16 www.rohm.com 2011.03 - rev. a ? 2011 rohm co., ltd. all rights reserved. bh6172gu reference data(vbat line transient response) vba t ldo1 vbat ldo2 vbat ldo3 ldo1 ldo2 ldo3 ldo4 ldo5 vba t ldo4 vusb ldo5
technical note 15/16 www.rohm.com 2011.03 - rev. a ? 2011 rohm co., ltd. all rights reserved. bh6172gu notes for use (1) absolute maximum ratings if applied voltage (vbat, vadp, vusb), operating temperature range (topr), or other absolute maximum ratings are exceeded, there is a risk of damage. since it is not possible to identify short, open, or other damage modes, if special modes in which absolute maximum ratings are exceeded are assumed, consid er applying fuses or other physical safety measures. (2) recommended operating range this is the range within which it is possible to obtain roughly the expected characteristics. for electrical characteristics, i t is those that are guaranteed under the conditions for each parameter. even when these are within the recommended operating range, voltage and temperatur e characteristics are indicated. (3) reverse connection of power supply connector there is a risk of damaging the lsi by reverse connection of the power supply connector. for protection from reverse connection , take measures such as externally placing a diode bet ween the power supply and the power supply pin of the lsi. (4) power supply lines in the design of the board pattern, make power supply and gnd line wiring low impedance. when doing so, although the digital power supply and analog power supply are the same pot ential, separate the digital power supply pattern and analog power supply pattern to deter digital noise from entering the analog power supply due to the common impedance of the wiring patterns. similarly take pattern des ign into account for gnd lines as well. furthermore, for all power supply pins of the lsi, in conjunction with inserting capacitors between powe r supply and gnd pins, when using electrolytic capacitors, determine constants upon adequately confirmi ng that capacitance loss occurring at lo w temperatures is not a problem for various characteristics of the capacitors used. (5) gnd voltage make the potential of a gnd pin such that it will be the lowest potential even if o perating below that. in addition, confirm that there are no pins for which the potential becomes less than a gnd by ac tually including transition phenomena. (6) shorts between pins and misinstallation when installing in the set board, pay adequate attention to orient ation and placement discrepancies of the lsi. if it is installed erroneously, there is a risk of lsi damage. t here also is a risk of damage if it is shorted by a foreign substance getting between pins or between a pin and a power supply or gnd. (7) operation in strong magnetic fields be careful when using the lsi in a strong magnetic field, since it may malfunction. (8) inspection in set board when inspecting the lsi in the set board, since there is a risk of stress to the lsi when capacitors are connected to low impedance lsi pins, be sure to discharge for each process. mor eover, when getting it on and off of a jig in the inspection process, always connect it after turning off the power supply, perform the inspection, and remove it after turning off the power supply. furthermore, as countermeasures against static electricity, use grounding in the assembly process and take appropriate care in transport and storage. (9) input pins parasitic elements inevitably are formed on an lsi structure due to potential relationships. because parasitic elements operate, they give rise to interference with circuit operat ion and may be the cause of malf unctions as well as damage. accordingly, take care not to apply a lower voltage than gnd to an input pin or use the lsi in other ways such that parasitic elements operate. moreover, do not apply a voltage to an input pin when the power supply voltage is not being applied to the lsi. furthermore, when the power supply voltage is being applied, make each input pin a voltage less than the power supply voltage as well as within the gu aranteed values of electrical characteristics. (10) ground wiring pattern when there is a small signal gnd and a la rge current gnd, it is recommended that you separate the large current gnd pattern and small signal gnd pattern and provide single point gr ounding at the reference point of the set so that voltage variation due to resistance components of the pattern wiring and large currents do not cause the small signal gnd voltage to change. take care that the gnd wiring pattern of externally attached components also does not change. (11) externally attached capacitors when using ceramic capacitors for externally attached capacitors, determine constants upon taking into account a lowering of the rated capacitance due to dc bias and ca pacitance change due to factors such as temperature. (12) thermal shutdown circuit (tsd) when the junction temperature becomes hig her than a certain specific value, the thermal shutdown circuit operates and turns the switch off. the thermal shutdown circuit, which is aimed at isolating the lsi from thermal runaway as much as possible, is not aimed at the pr otection or guarantee of the lsi. therefore, do not continuously use the lsi with this circuit operating or use the lsi assuming its operation. (13) thermal design perform thermal design in which there ar e adequate margins by taking into account the permissible dissipation (pd) in actual states of use. (14) rush current extra care must be taken on power coupling, power, ground line impedance, and pcb design while excess amount of rush current might instantly flow through the power line when power ing-up a lsi which is equipped with several power supplies, depending on on/off sequence, and ramp delays.
technical note 16/16 www.rohm.com 2011.03 - rev. a ? 2011 rohm co., ltd. all rights reserved. bh6172gu ordering part number b h 6 1 7 2 g u - e 2 part no. part no. package gu: vcsp85h2 packaging and forming specification e2: embossed tape and reel ? order quantity needs to be multiple of the minimum quantity. embossed carrier tape tape quantity direction of feed the direction is the 1pin of product is at the upper left when you hold reel on the left hand and you pull out the tape on the right hand 3000pcs e2 () direction of feed reel 1pin (unit : mm) vcsp85h2 (bh6172gu) s 0.06 s a b b a 0.05 12345 a b c d e ( 0.15)index post 1.0max 0.25 0.1 0.3 0.05 1pin mark 2.60 0.05 2.60 0.05 0.3 0.05 p=0.5 4 p=0.5 4 24- 0.3 0.05
r1120 a www.rohm.com ? 2011 rohm co., ltd. all rights reserved. notice rohm customer support system http://www.rohm.com/contact/ thank you for your accessing to rohm product informations. more detail product informations and catalogs are available, please contact us. notes no copying or reproduction of this document, in part or in whole, is permitted without the consent of rohm co.,ltd. the content specified herein is subject to change for improvement without notice. the content specified herein is for the purpose of introducing rohm's products (hereinafter "products"). if you wish to use any such product, please be sure to refer to the specifications, which can be obtained from rohm upon request. examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the products. the peripheral conditions must be taken into account when designing circuits for mass production. great care was taken in ensuring the accuracy of the information specified in this document. however, should you incur any damage arising from any inaccuracy or misprint of such information, rohm shall bear no responsibility for such damage. the technical information specified herein is intended only to show the typical functions of and examples of application circuits for the produc ts. rohm does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by rohm and other parties. rohm shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. the products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, commu- nication devices, electronic appliances and amusement devices). the products specified in this document are not designed to be radiation tolerant. while rohm always makes efforts to enhance the quality and reliability of its products, a product may fail or malfunction for a variety of reasons. please be sure to implement in your equipment using the products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any product, such as derating, redundancy, fire control and fail-safe designs. rohm shall bear no responsibility whatsoever for your use of any product outside of the prescribed scope or not in accordance with the instruction manual. the products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel- controller or other safety device). rohm shall bear no responsibility in any way for use of any of the products for the above special purposes. if a product is intended to be used for any such special purpose, please contact a rohm sales representative before purchasing. if you intend to export or ship overseas any product or technology specified herein that may be controlled under the foreign exchange and the foreign trade law, you will be required to obtain a license or permit under the law.

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